[IA64] Handle NAT bit for dom0 and domU
authorAlex Williamson <alex.williamson@hp.com>
Wed, 11 Apr 2007 13:24:44 +0000 (07:24 -0600)
committerAlex Williamson <alex.williamson@hp.com>
Wed, 11 Apr 2007 13:24:44 +0000 (07:24 -0600)
This fixes ia32 apps running under the IA32-EL.

Signed-off-by: Anthony Xu <anthony.xu@intel.com>
linux-2.6-xen-sparse/arch/ia64/kernel/asm-offsets.c
linux-2.6-xen-sparse/arch/ia64/xen/xenentry.S
linux-2.6-xen-sparse/arch/ia64/xen/xenivt.S
linux-2.6-xen-sparse/include/asm-ia64/xen/privop.h
xen/arch/ia64/xen/hyperprivop.S

index 905d0f726741ff533de2ae973d4067b373d6f196..2aa8c101aabbd952cf2e03f7fed719d18c52ca6a 100644 (file)
@@ -290,5 +290,7 @@ void foo(void)
        DEFINE_MAPPED_REG_OFS(XSI_BANKNUM_OFS, banknum);
        DEFINE_MAPPED_REG_OFS(XSI_BANK0_R16_OFS, bank0_regs[0]);
        DEFINE_MAPPED_REG_OFS(XSI_BANK1_R16_OFS, bank1_regs[0]);
+       DEFINE_MAPPED_REG_OFS(XSI_B0NATS_OFS, vbnat);
+       DEFINE_MAPPED_REG_OFS(XSI_B1NATS_OFS, vnat);    
 #endif /* CONFIG_XEN */
 }
index e122449c16dd949f1926397c76ead3ec51183e52..b9394ab0505076bf1dda7d19e746a694fb2dc9d6 100644 (file)
@@ -614,6 +614,7 @@ GLOBAL_ENTRY(ia64_leave_kernel)
 #ifdef CONFIG_XEN
        ;;
        // r16-r31 all now hold bank1 values
+       mov r15=ar.unat
        movl r2=XSI_BANK1_R16
        movl r3=XSI_BANK1_R16+8
        ;;
@@ -641,6 +642,11 @@ GLOBAL_ENTRY(ia64_leave_kernel)
 .mem.offset 0,0; st8.spill [r2]=r30,16
 .mem.offset 8,0; st8.spill [r3]=r31,16
        ;;
+       mov r3=ar.unat
+       movl r2=XSI_B1NAT
+       ;;
+       st8 [r2]=r3
+       mov ar.unat=r15
        movl r2=XSI_BANKNUM;;
        st4 [r2]=r0;
 #else
index eaa9801bf08007db79ea927b933328b32f567aae..a411bb3a4aa069c6c5148734ac08de3ecf4aadd6 100644 (file)
@@ -2013,33 +2013,6 @@ END(ia32_interrupt)
        DBG_FAULT(66)
        FAULT(66)
 
-#ifdef CONFIG_XEN
-       /*
-        * There is no particular reason for this code to be here, other than that
-        * there happens to be space here that would go unused otherwise.  If this
-        * fault ever gets "unreserved", simply moved the following code to a more
-        * suitable spot...
-        */
-
-GLOBAL_ENTRY(xen_bsw1)
-       /* FIXME: THIS CODE IS NOT NaT SAFE! */
-       movl r30=XSI_BANKNUM;
-       mov r31=1;;
-       st4 [r30]=r31;
-       movl r30=XSI_BANK1_R16;
-       movl r31=XSI_BANK1_R16+8;;
-       ld8 r16=[r30],16; ld8 r17=[r31],16;;
-       ld8 r18=[r30],16; ld8 r19=[r31],16;;
-       ld8 r20=[r30],16; ld8 r21=[r31],16;;
-       ld8 r22=[r30],16; ld8 r23=[r31],16;;
-       ld8 r24=[r30],16; ld8 r25=[r31],16;;
-       ld8 r26=[r30],16; ld8 r27=[r31],16;;
-       ld8 r28=[r30],16; ld8 r29=[r31],16;;
-       ld8 r30=[r30]; ld8 r31=[r31];;
-       br.ret.sptk.many b0
-END(xen_bsw1)
-#endif
-
        .org ia64_ivt+0x7f00
 /////////////////////////////////////////////////////////////////////////////////////////
 // 0x7f00 Entry 67 (size 16 bundles) Reserved
@@ -2167,4 +2140,38 @@ GLOBAL_ENTRY(xen_event_callback)
        (p6) br.spnt.few 1b     // call evtchn_do_upcall again.
        br.sptk.many ia64_leave_kernel   
 END(xen_event_callback)
+
+
+       /*
+        * There is no particular reason for this code to be here, other than that
+        * there happens to be space here that would go unused otherwise.  If this
+        * fault ever gets "unreserved", simply moved the following code to a more
+        * suitable spot...
+        */
+
+GLOBAL_ENTRY(xen_bsw1)
+       /* FIXME: THIS CODE IS NOT NaT SAFE! */
+       mov r14=ar.unat
+       movl r30=XSI_B1NAT
+       ;;
+       ld8 r30=[r30];;
+       mov ar.unat=r30
+       movl r30=XSI_BANKNUM;
+       mov r31=1;;
+       st4 [r30]=r31;
+       movl r30=XSI_BANK1_R16;
+       movl r31=XSI_BANK1_R16+8;;
+       ld8.fill r16=[r30],16; ld8.fill r17=[r31],16;;
+       ld8.fill r18=[r30],16; ld8.fill r19=[r31],16;;
+       ld8.fill r20=[r30],16; ld8.fill r21=[r31],16;;
+       ld8.fill r22=[r30],16; ld8.fill r23=[r31],16;;
+       ld8.fill r24=[r30],16; ld8.fill r25=[r31],16;;
+       ld8.fill r26=[r30],16; ld8.fill r27=[r31],16;;
+       ld8.fill r28=[r30],16; ld8.fill r29=[r31],16;;
+       ld8.fill r30=[r30]; ld8.fill r31=[r31];;
+       mov ar.unat=r14
+       br.ret.sptk.many b0
+END(xen_bsw1)
+
+   
 #endif
index 19624f5ba31ff80fb8ceff3a9111fcf166271602..96f5f099badf027e9e0cb0da4b91f37d9a24900f 100644 (file)
@@ -57,6 +57,7 @@
 #define XSI_PSR_IC             (XSI_BASE + XSI_PSR_IC_OFS)
 #define XSI_IPSR               (XSI_BASE + XSI_IPSR_OFS)
 #define XSI_IIP                        (XSI_BASE + XSI_IIP_OFS)
+#define XSI_B1NAT              (XSI_BASE + XSI_B1NATS_OFS)
 #define XSI_BANK1_R16          (XSI_BASE + XSI_BANK1_R16_OFS)
 #define XSI_BANKNUM            (XSI_BASE + XSI_BANKNUM_OFS)
 #define XSI_IHA                        (XSI_BASE + XSI_IHA_OFS)
index f8f799d1d91e8facbe607686649b1e0b4ddd206e..0510554ae8d5c7f6e25a571eb796e3984887231f 100644 (file)
@@ -304,6 +304,8 @@ ENTRY(hyper_ssm_i)
        ;;
        adds r2=XSI_BANK1_R16_OFS-XSI_PSR_IC_OFS,r18;
        adds r3=(XSI_BANK1_R16_OFS+8)-XSI_PSR_IC_OFS,r18;;
+       // temporarily save ar.unat
+       mov r28=ar.unat   
        bsw.1;;
        // FIXME?: ar.unat is not really handled correctly,
        // but may not matter if the OS is NaT-clean
@@ -324,6 +326,12 @@ ENTRY(hyper_ssm_i)
        .mem.offset 0,0; st8.spill [r2]=r30,16;
        .mem.offset 8,0; st8.spill [r3]=r31,16 ;;
        bsw.0 ;;
+       mov r27=ar.unat
+       adds r26=XSI_B1NATS_OFS-XSI_PSR_IC_OFS,r18 ;;
+       //save bank1 ar.unat
+       st8 [r26]=r27
+       //restore ar.unat
+       mov ar.unat=r28
        mov r2=r30
        mov r3=r29
        adds r20=XSI_BANKNUM_OFS-XSI_PSR_IC_OFS,r18 ;;